The present invention relates to a manufacturing method for a semiconductor device, and particularly relates to a technique which is capable of being suitably used for a semiconductor device in which a non-volatile memory and a normal MISFET (Metal Insulator Semiconductor Field Effect Transistor) are combined.
Semiconductor integrated circuits (LSI: Large Scale Integrated circuit) having a non-volatile memory combined with a logic circuit, a memory circuit, an analog circuit or the like have been in widespread use. MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) including a silicon oxide (SiO2) film in a gate insulating film, among MOSFETs, are frequently used in the logic circuit or the like. On the other hand, FETs including a charge storage film in the gate insulating film may be used in the non-volatile memory. The charge storage film has a trap level, and carriers are trapped (stored) in the trap level. Thereby, information is stored using a phenomenon in which the threshold voltage of the FET changes. The carriers trapped in the trap level are held even when the supply of power to a circuit is removed, and thus the FET functions as a non-volatile memory. As the charge storage film, a silicon nitride (Si3N4) film is frequently used, and is formed of a three-layer structure interposed in a potential barrier film, between a gate electrode and a channel. As the potential barrier film, a silicon oxide (SiO2) film is frequently used, and the film of the three-layer structure is called an ONO (Oxide/Nitride/Oxide) film. Such a FET is called a MONOS (Metal/Oxide/Nitride/Oxide/Semiconductor) type FET from the structure. In a manufacturing method for an LSI having the non-volatile memory combined therein, a gate insulating film of a normal FET and an ONO film are required to be formed on the same semiconductor substrate.